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Particles From Outer Space Could Make Your Smartphone, Computer Go Haywire

Feb 20, 2017 10:41 AM EST
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Electrically charged particles coming from cosmic rays generated in outer space could interact with smartphones, computers and other personal devices, resulting operational failures.
(Photo : Justin Sullivan/Getty Images)

A new study from the Vanderbilt University's Radiation Effects Research Group revealed that electrically charged particles coming from cosmic rays generated in outer space could interact with smartphones, computers and other personal devices, resulting to operational failures.

The study, presented at the annual meeting of the American Association for the Advancement of Science in Boston, showed that particles raining down from outer space have the ability to crash a computer or freeze a smartphone.

"Our study confirms that this is a serious and growing problem," said Bharat Bhuva, professor of electrical engineering at Vanderbilt University, in a statement. "This did not come as a surprise. Through our research on radiation effects on electronic circuits developed for military and space applications, we have been anticipating such effects on electronic systems operating in the terrestrial environment."

The negative impact of energetic neutrons, muons, pions and alpha particles to electronic devices is not relatively new. The interaction between these particles and an integrated unit could result to a so-called single-event upset (SEU). During SEU, individual bits of data stored in the memory could be altered, turning 0s to 1s or vice versa.

The current computer chip technology uses 3D transistors (known as FinFET) that are only 16 nanometers in size. As the size of the transistors in computer chips shrink and the power and capacity of the digital systems increase, the negative effects of the alien particles are getting more serious.

The researchers noted that the smaller size of the transistors is making them less likely to be struck by the particles. However, the smaller size of the transistor also means less electrical charge to represent a logical bit, increasing the risk SEU when struck by an energetic particle.

The 3D architecture of the 16-nanometer circuits makes it less susceptible to SEUs, compared to previous technologies that used 2D architecture. However, this improvement in architecture has been offset by the increase number of transistors in each chip. The increase in total number of transistors could make the SEU failure rate to rise continuously.

 Despite the ability of the energetic particles to cause low-grade havoc to electronic devices, the researchers noted that consumers should not be concerned at all. The problem created by the alien particles will be faced by the industry and engineers.

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